1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a metal oxide semiconductor (MOS) transistor having high-breakdown voltage and high-speed characteristics.
2. Discussion of the Related Art
The most general type of metal oxide semiconductor field effect transistor (MOSFET) includes a gate electrode 13 formed on a semiconductor substrate 11 with a gate insulating film 12 interposed therebetween, as shown in FIG. 1. Source region 14 and drain region 15 are impurity diffusion regions formed at respective sides of the gate electrode 13 in the substrate 11. Due to a large junction capacitance between source/drain regions 14 and 15 and a bulk silicon, i.e., substrate 11, the abovementioned MOSFET is unsuitable for a semiconductor device requiring high-speed operations.
When the above MOSFET is applied to a highly integrated semiconductor device, isolation and latch up characteristics become poor. Moreover, the source/drain regions 14 and 15 are formed in the substrate 11 by implanting impurity ions using an ion-implantation technique. To operate the above MOSFET under a high voltage, a complicated insulation structure must be formed around the source/drain regions 14 and 15. Accordingly, the above MOSFET cannot be applied to a highly integrated circuit requiring a high voltage.
A MOSFET having a silicon on an insulator (SOI) structure has been proposed as a device favorable to higher integration. In this device, power consumed is low and a high voltage operation can be realized without latch up and soft error.
In the above MOSFET having the SOI structure, as shown in FIG. 2, an insulating layer 22 is formed on a substrate 21. A polycrystalline silicon layer 23 is formed on insulating layer 22 as a semiconductor layer. A gate insulating film 24 and a gate electrode 25 are formed sequentially thereon. Source/drain regions 26 and 27 are formed at respective sides of gate electrode 26 in silicon layer 23.
A high breakdown voltage can be obtained in the above MOSFET, and thereby used in a highly integrated circuit at high voltage. However, if the insulating film underneath the semiconductor layer having the SOI structure is formed very thick, a drain electric field affects the electric field distribution of the semiconductor layer, thereby increasing a short-channel effect. If the insulating film is formed thin, the short-channel effect can be suppressed. However, the decrease in thickness of the insulating film causes an increase in parasitic capacitance, and hence, high-speed characteristics cannot be obtained.